MyHDL Discourse

Enhancement Request


MEP This category can be used to discuss myhdl enhancement proposals (MEP). These discussions can lead to the posting of a MEP. See the <a href="http://dev.myhdl.org/meps/mep-001.html">MEP guidelines</a> for more information on the enhancement proposals process inspired by the python enhancement proposal (PEP) process.
Topic Replies Created
About the Enhancement Request category 1 October 6, 2016
Could modbv support non powers of two? 11 December 21, 2018
Coalesce identical sequential blocks into the same block? 10 December 21, 2018
Conversion hierarchy extraction? 9 December 3, 2018
VHDL Bit string representation 16 October 30, 2018
Formal methods and MyHDL 3 August 19, 2018
Add new Bool type to MyHDL? 10 July 3, 2018
Matching a signal against a bitvector 10 May 30, 2018
Sort signal declarations in generated VHDL 4 October 5, 2017
Add support for nested functions 5 June 14, 2017
Making cosimulation more user friendly 3 November 12, 2016
On the design of state-machines 4 April 3, 2017
Generating hierarchical VHDL 2 March 2, 2017
Instanciate undefined Signal() 9 October 19, 2016
Intbv and the .next attribute 3 October 14, 2016
Conflict: print() 6 June 23, 2016