MyHDL Discourse

Enhancement Request

MEP This category can be used to discuss myhdl enhancement proposals (MEP). These discussions can lead to the posting of a MEP. See the <a href="">MEP guidelines</a> for more information on the enhancement proposals process inspired by the python enhancement proposal (PEP) process.
About the Enhancement Request category [Enhancement Request] (1)
Could modbv support non powers of two? [Enhancement Request] (11)
Coalesce identical sequential blocks into the same block? [Enhancement Request] (10)
Conversion hierarchy extraction? [Enhancement Request] (9)
VHDL Bit string representation [Enhancement Request] (16)
Formal methods and MyHDL [Enhancement Request] (3)
Add new Bool type to MyHDL? [Enhancement Request] (10)
Matching a signal against a bitvector [Enhancement Request] (10)
Sort signal declarations in generated VHDL [Enhancement Request] (4)
Add support for nested functions [Enhancement Request] (5)
Making cosimulation more user friendly [Enhancement Request] (3)
On the design of state-machines [Enhancement Request] (4)
Generating hierarchical VHDL [Enhancement Request] (2)
Instanciate undefined Signal() [Enhancement Request] (9)
Intbv and the .next attribute [Enhancement Request] (3)
Conflict: print() [Enhancement Request] (6)