# Conversion hierarchy extraction?

**URL:** <https://discourse.myhdl.org/t/conversion-hierarchy-extraction/348>\
**Category:** Enhancement Request\
**Created:** [December 3, 2018, 8:49am UTC](https://discourse.myhdl.org/t/conversion-hierarchy-extraction/348 "2018-12-03T08:49:58Z")\
**Posts on this page:** 9\
**Page:** 1

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**Author:** ![DrPi](https://yyz2.discourse-cdn.com/flex030/user_avatar/discourse.myhdl.org/drpi/32/36_2.png) [@DrPi](https://discourse.myhdl.org/u/DrPi)\
**Post date:** [December 3, 2018, 8:49am UTC](https://discourse.myhdl.org/t/conversion-hierarchy-extraction/348/1 "2018-12-03T08:49:58Z")

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Does someone work on hierarchy extraction in VHDL/verilog converter ?

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**Author:** ![hgomersall](https://yyz2.discourse-cdn.com/flex030/user_avatar/discourse.myhdl.org/hgomersall/32/10_2.png) [@hgomersall](https://discourse.myhdl.org/u/hgomersall)\
**Post date:** [December 3, 2018, 11:47am UTC](https://discourse.myhdl.org/t/conversion-hierarchy-extraction/348/2 "2018-12-03T11:47:12Z")

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It’s something I’ve been thinking about, but don’t yet have anything. Perhaps others do? There are some subtleties that need to be addressed in how to design the interfaces…

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**Author:** ![DrPi](https://yyz2.discourse-cdn.com/flex030/user_avatar/discourse.myhdl.org/drpi/32/36_2.png) [@DrPi](https://discourse.myhdl.org/u/DrPi)\
**Post date:** [December 4, 2018, 9:47am UTC](https://discourse.myhdl.org/t/conversion-hierarchy-extraction/348/3 "2018-12-04T09:47:20Z")

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> [@hgomersall](#):
>
> There are some subtleties that need to be addressed in how to design the interfaces

Can you elaborate on this ?

Looking at \_ToVHDL.py, I noticed global variables are used. This is will be a problem.

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**Author:** ![hgomersall](https://yyz2.discourse-cdn.com/flex030/user_avatar/discourse.myhdl.org/hgomersall/32/10_2.png) [@hgomersall](https://discourse.myhdl.org/u/hgomersall)\
**Post date:** [December 4, 2018, 10:47am UTC](https://discourse.myhdl.org/t/conversion-hierarchy-extraction/348/4 "2018-12-04T10:47:24Z")

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Right - I think there needs to be fully elaborated block level implementation before we can have a hierarchy. The netlists are currently implicit through global signals, but the connections will need to be made explicit between each level in the hierarchy.

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**Author:** ![DrPi](https://yyz2.discourse-cdn.com/flex030/user_avatar/discourse.myhdl.org/drpi/32/36_2.png) [@DrPi](https://discourse.myhdl.org/u/DrPi)\
**Post date:** [December 4, 2018, 12:50pm UTC](https://discourse.myhdl.org/t/conversion-hierarchy-extraction/348/5 "2018-12-04T12:50:43Z")

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Is there a document describing how the elaboration works ?  
Understanding the code is quite hard.

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**Author:** ![hgomersall](https://yyz2.discourse-cdn.com/flex030/user_avatar/discourse.myhdl.org/hgomersall/32/10_2.png) [@hgomersall](https://discourse.myhdl.org/u/hgomersall)\
**Post date:** [December 4, 2018, 1:15pm UTC](https://discourse.myhdl.org/t/conversion-hierarchy-extraction/348/6 "2018-12-04T13:15:59Z")

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Nope and yep. There has been much discussion about this over on gitter.

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**Author:** ![mhavu](https://yyz2.discourse-cdn.com/flex030/user_avatar/discourse.myhdl.org/mhavu/32/86_2.png) [@mhavu](https://discourse.myhdl.org/u/mhavu)\
**Post date:** [December 5, 2018, 9:33am UTC](https://discourse.myhdl.org/t/conversion-hierarchy-extraction/348/7 "2018-12-05T09:33:35Z")

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> Is there a document describing how the elaboration works ?  
> Understanding the code is quite hard.

The VHDL converter would definitely benefit from adding, e.g., doc strings to each function. Can I perhaps persuade everyone who knows their way around the code to add some helpful comments whenever they touch the code? It would make it easier for new contributors to get started.

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**Author:** ![DrPi](https://yyz2.discourse-cdn.com/flex030/user_avatar/discourse.myhdl.org/drpi/32/36_2.png) [@DrPi](https://discourse.myhdl.org/u/DrPi)\
**Post date:** [December 10, 2018, 10:37am UTC](https://discourse.myhdl.org/t/conversion-hierarchy-extraction/348/8 "2018-12-10T10:37:05Z")

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@hgomersall What do you think would be the best way to go ahead ?

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**Author:** ![hgomersall](https://yyz2.discourse-cdn.com/flex030/user_avatar/discourse.myhdl.org/hgomersall/32/10_2.png) [@hgomersall](https://discourse.myhdl.org/u/hgomersall)\
**Post date:** [December 10, 2018, 11:24am UTC](https://discourse.myhdl.org/t/conversion-hierarchy-extraction/348/9 "2018-12-10T11:24:52Z")

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@DrPi I think head over to gitter and join the conversation!
