Before submitting a bug I’d like to check my assumptions are correct.
I have the following in a design :
def AudioSample(reset_value=0, nb_bits=24): return intbv(0, min=-(2**(nb_bits-1)), max=2**(nb_bits-1)) # min included ; max excluded @block def my_code(): ... Add = Signal(AudioSample(0, 2+len(Mul0))) Result = Signal(AudioSample(0, 1+len(Add)-self.norm_size)) RoundingValue = AudioSample(0, len(Result)) ... @always_seq(i_Clk.posedge, reset=None) def compute_proc() : .... Result.next = Add[:norm_size] + RoundingValue ... ...
Part of the generated code is the following :
... signal Add: signed (49 downto 0) := 50X"0000000000000"; signal Result: signed (30 downto 0) := 31X"00000000"; ... COMPUTE_PROC: process (i_Clk) is variable RoundingValue: signed(30 downto 0); begin ... Result <= (signed(resize(unsigned(Add(50-1 downto 20)), 31)) + RoundingValue); ....
The problem is in the resizing of Add signal.
I think that Add shall not be casted to unsigned before resizing. By casting Add to unsigned, the sign bit is lost during the resize.
Am I right ?