About eliminating stub code for cosimulation, I am thinking about if it's possible to use only simulation callback routines when designing the vpi module. Without calltf routines, maybe cosimulation will no longer need additional Verilog code. And module ports can be inferred by using vpiInput and vpiOutput.
Callback routines can be triggered by event, time or action but one major question is how to obtain object handles when there is no system task or function called. I seek answer in The Verilog PLI Handbook (by Stuart Sutherland) and the source code vpi_user.h but I failed, so I doubt if my idea is a right way to do this.
I know cocotb is a great example to learn but its vpi design is complicated and I believe there is a lot to do before I figure out its mechanism. Anyway, I created a PR and committed a very very rough draft of my proposed vpi module design, just to get a chance to continue in GSoC.
In my plan, a working vpi module in C that gets rid of stub code in cosimulation will be the first step, then refactor it in rust. And the second step is to add simulator option for cosimulation object and the third step is to make interfacing more simple, just like cocotb does.
If you have any advice for me, I always look forward to discussing with you.