How to do cosimulation with a commercial tool?

1

Hello,

there is a howto available to run a cosimulation between MyHDL and verilog on Windows here: Co-simulation with Verilog — MyHDL 0.11 documentation

However, I was wondering what steps I need to take to setup cosimulation with a commercial simulator in Unix.
I have seen something related to PLI interface - is this the right place to explore? Is there any example available to get started with e.g. VCS?
Thanks for your help!

2

You might want to check the VPI capabilities, this is normally the easiest to implement, as it’s done for OpenSource simulators as iverilog and ghdl. The crucial thing is that your driver routine is the master driving the (compiled) simulation model through some kind of shared memory interface or pipe (like for the implementations in myhdl/cosimulation). So, this may have performance limits and can not be run asynchronously, let aside this being thread safe.

This might be a usable entry point/overview: Verilog PLI Tutorial Part-VI

So roughly summarizing how to make this visible from the Python world:

  • Write a tiny C layer according to the VPI spec registering signal objects or querying them from the simulation hierarchy (this is unfortunately a little simulator specific)
  • Wrap them using a Python wrapper tool such as boost python or Cython (I’d recommend the latter) so that you can get/set signals, delays, events, etc. from the Python side
  • Optionally: Create a wrapper object that allows you to swap out @block units against their co-simulated counterparts, fires up the simulator instance and talks to it, etc.
3

Thanks that link is indeed what I was looking for and helps in my confusion.

4

cocotb and pyhvl seem also itneresting