Here is a dump of GSoC ideas I would like to mentor. Looking for feedback before I put them on the ideas page.
FIRRTL conversion support
Add support for converting MyHDL block’s to FIRRTL.
Whether we like it or not, FIRRTL is the future. Since it is backed by the Berkley folks, a bunch of tools and libraries for FIRRTL will pop up. In the future, we can drop support for conversion to Verilog and VHDL and use FIRRTL converters instead.
Students who want to work on this project will need to go through the FIRRTL spec and identify potential caveats and limitations of converting MyHDL to FIRRTL.
This project will entail writing a new VPI module in Rust which will allow more user friendly cosimulation.
More info: Making cosimulation more user friendly