MyHDL
Programming Altera serial configuration device with Python
DrPi
September 12, 2019, 11:37am
14
That’s good news
Yep, MPSSE mode is very slow.
show post in topic
Related topics
Topic
Replies
Views
Activity
From myHDL to syntesis
Support
8
1036
August 7, 2018
Sanity check: Ps/2 Keyboard on an fpga
Support
2
554
April 21, 2022
Device primitive instantiate with user defined code
GSoC
3
1422
June 2, 2016
Help: SDR, DSP, FPGAs and Gnuradio
Support
4
1336
October 9, 2017
Connecting signals between modules
Support
2
839
April 4, 2018