Use VHDL library

I’m trying to use a component written in VHDL inside myHDL. Specifically I try to create a configurable PLL block. I was able to add the component declaration using the component_declarations argument of the instance.convert method. I was also able to instantiate it using the instance.vhdl_code property. But I struggle to add the library:

library my_library;
use my_library.component;

How can I achieve this? Also: Is there a better way to add the component declaration? Because ideally I want the component declaration hidden from the user of the pll block.

You can add library="my_library", use_clauses="use my_library.component;\n\nuse work.pck_myhdl_011.all;" to the convert() function.

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Thanks. But isn’t the library property used to define the library my code is compiled into? But I guess I could add a library clause to the use_clauses? Or am I wrong?

In, function _writeModuleHeader() there is :

    if lib != "work":
        print("library %s;" % lib, file=f)
    if useClauses is not None:
        print("use %s.pck_myhdl_%s.all;" % (lib, _shortversion), file=f)
    if needPck:
        print("use %s.pck_%s.all;" % (lib,, file=f)

lib is set to “work” (default) at init then to library parameter if not None.
useClauses is set to use_clauses parameter.
needPck is True when enums are used in top level interface.

You can forget library parameter and only use use_clauses parameter.
use_clauses="library my_library;\nuse my_library.component;\n\nuse work.pck_myhdl_011.all;"

WARNING : pck_myhdl_011.vhd is automatically generated. The corresponding use clause is automatically inserted in the generated VHDL file except when use_clauses parameter is used. This is why you have to add it in use_clauses. The generated package contains MyHDL version number ! pck_myhdl_ 011 .vhd. Changing MyHDL version implies modifying your script for it to continue to generate correct output.