GSoC week 12 roundup

This is the last roundup, as posted in previous GSoC roundups the GSoC program has outlined that all students have their final code committed by 20-Aug. If you have not committed your final code make sure to do so in the next couple days and prepare your final blog post that will be used in your evaluation submission.

All mentors need to provide a summary of the students final evaluation to me (@cfelton) via email by 22-Aug. The assigned mentors were never corrected in the GSoC system, I will need to complete all the final evaluations again. Because of schedule conflicts and PSF requirements I will be completing all the evaluations by the 23rd, please provide the final review as soon as possible.

** Student final project submission **
Students, make sure to have your final blog post, the final post should review what you completed and what is outstanding. I should be able to easily understand what is working in the projects, what is missing, and what doesn’t work. This detailed final post is required for a passing evaluation.

The GSoC work product submission guidelines outline what the final post should have. Take the time required to generate the final blog post that you will link in your submission, it should have:

  1. Description of the work completed.
  2. Any outstanding work if not completed.
  3. Link to the main repository.
  4. Links to the PRs created during the project.

Review the submission guidelines page in detail.

The idea of GSoC isn’t that students churn out code – it’s important that the code be potentially useful to the hosting Open Source project!

Also make sure the README on the project repositories is complete, it should give an overview of the project and instructions for a user to get started: install, run tests, the core interfaces, and basic functional description.

Student week12 summary (last blog, commits, PR):

health 87%, coverage 97%
@mkatsimpris: 12-Aug, >5, Y
@Vikram9866: 07-Aug, >5, Y

health 96%, coverage 51%
@meetsha1995: 11-Aug, >5, Y
@srivatsan: 14-Aug, >5, N

health 93%, coverage 92%
@ravijain056, 02-Aug, >5, N

Students and mentors:
@mkatsimpris, @vikram, @meetshah1995, @Ravi_Jain, @sriramesh4,
@jck, @josyb, @hgomersall, @martin, @guy.eschemann, @eldon.nelson,
@nikolaos.kavvadias, @tdillon, @cfelton, @andreprado88, @jos.huisken

Links to the student blogs and repositories:

Merkourious, @mkatsimpris: gsoc blog, github repo
Vikram, @Vikram9866: gsoc blog, github repo
Meet, @meetshah1995, gsoc blog: github repo
Srivatsan, @srivatsan-ramesh: gsoc blog, github repo
Ravi @ravijain056: gsoc blog, github repo
Pranjal, @forumulator: gsoc blog, github repo

I have updated the post with a link to the student final submission guidelines:

All students make sure your final blog post has all the information outlined in the guidelines. Let us know if you have any questions.

@martin and @andreprado88 do either of you have any feedback on @forumulator’s progress and/or effort?


@cfelton, not sure if you’ve seen or not my comments on his recent PR (#2). I thought his work looks pretty good. He seems pretty unkeen to engage with anyone though (all his messages were private, which was unnecessary, and he takes ages to respond).

@hgomersall thank you for reviewing the student’s code and providing some feedback! I have not seen the comments on the code, trying to finish up with some of the other students and other responsibilities.

I have about lost my patience with @forumulator, he is demanding instant feedback and attention from us while he demonstrated little effort in communicating, providing status, taking responsibility, etc. The utter disregard for our time is unacceptable.

Hey Chris,

He contacted me yesterday requesting some feedback on the project. I will
have a look most likely over the weekend and then give a proper feedback.

@andreprado88 thanks!

I’m in email contact with him. Looks like it is progressing and he states that VHDL is now generated. Maybe we should discuss after he has posted the final blog post.


Can you help on this one, I am out of the country till the 21st?

I will be working some of the 22nd.


@cfelton, @martin, @andreprado88, @hgomersall
My final blog is done and here : 95% of my project is done, just the command bridge remains, which is honestly, not that big a deal to write, I’m just out of time.

I have the timing and flow down to the finest details, so when I do write that, I expect to be able to interface it with rhea cores and test it immediately.

A slight problem is that the VHDL synthesizer is currently not able to infer RAM from the code, and is instead using registers, have to also look into that.

Also, please have a look at