# How can I implement this?

Hello I would like to implement the following logic with a for loop in myhdl.
Can anyone tell me how to do it ? Thanks

``````intMux = [Signal(intbv(0)[16:]) for i in range(8)]
@always(reset.posedge, clk.posedge)
def statsGen():
if reset == 1 :
sumInt.next = 0
elif (vld == 1):
sumInt.next = sumInt + intMux + intMux + intMux + \
intMux + intMux + intMux + intMux + intMux``````
``````@always(reset.posedge, clk.posedge)
def statsGen():
if (reset == 1):	sumInt.next = 0
elif (vld == 1):
sumVar = 0
for ii in range( AddendCount ):
sumVar = sumVar + intMux[ii]
sumInt.next = sumVar
``````

Jan Coombs

My take on this:

``````def sum(a):
if len(a) > 2:
# split in two
n = len(a) // 2
return sum(a[:n]) + sum(a[n:])
elif len(a) == 2:
return a + a
else:
return a

intMux = [Signal(intbv(0)[16:]) for __ in range(8)]

@always_seq(clk.posedge, reset)
def statsgen():
if vld:
sumInt.next = sum(intMux)
``````

This implements a binary tree-like circuit, and will give you the fastest implementation in hardware.