Signed error with lshift

Hi All,

I want to shift a signal left if the msbit is false in a clocked process… (Verilog has no issue with this)

shift.next = mult << ~mult[WIDTH2M-1]

i.e. of mult[WIDTH2M-1] is false, shift left otherwise do not.

This gives an error
File “D:\Lumetrica_Projects\myHDL_IP\math\floating_point\fp_multiply.py”, line 41, in comb2_logic
shift.next = mult << int(~mult[WIDTH2M-1])
File “d:\lumetrica_projects\adc_interface\src\myhdl\myhdl_Signal.py”, line 434, in lshift
return self._val << other
File “d:\lumetrica_projects\adc_interface\src\myhdl\myhdl_intbv.py”, line 257, in lshift
return intbv(int(self._val) << other)
ValueError: negative shift count

My Signals are modbv() and not intbv - if that matters

If there is a way to cast this to avoid the error I haven’t found it yet.

Turning it into an ‘if … else’ is really quite messy.- but I guess I can do this.

Do I register this as a bug or is it correct behaviour?

Regards,

Steve.

Hi Steve,

This is in simulation, I assume.
~a[x] resolves to either -1 or -2 which is a negative shift and raises a ValueError in Python.
Correct behavior.
c.next = b << (not b[3]) will simulate correctly and convert to:
assign c = (b << (!b[3]));
and
c <= shift_left(b, to_integer((not bool(b(3)))));
The VHDL is correct. I assume that Verilog will have no issue either.

Regards,
Josy

Hi Josy,

This was in verilog generation and not simulation.

You gave me the clue though the shift distance has to be cast as an int so …
mult.next = mult << int(~mult[WIDTH2M-1]) gave the correct result

assign shift = (mult << (~mult[(16 - 1)]));

Thank you (again)

Hi Josy, …

It was in simulation also (now that I checked again) and so now the mult << int(not mult[… ) is the correct answer.

Steve.