I describe in py post in stackoverflow -with a short testcase- the following assignment of a 16 bit unsigned rxdata and a signed 12 bit bipolar:
bipolar.next=rxdata[:4].signed()
this assignment fails at runtime with negative numbers in rxdata. (The checker assumes rxdata is unsigned and does not take into account the .signed() )
Maybe I need to use shadow Signals and .signed() to extract a signal bipolar (12 bit signed) from a unsigned Register rxdata (16 bit from a spi Transfer):
bipolar.next=rxdata(16,4).signed()
This makes the Simulation work – but unfortunately is not compiling and running in my fpga.
I’m sure there must be a ‘right’ way to do it. Can someone give me a hint?
Applying .signed() to a slice should work. This is a MyHDL limitation.
The use of a variable is a workaround. If you look at the generated code, it is ok but not ideal.